pcb Frequently Asked Questions
I. Pad overlap
1. Overlapping of pads (except surface pads) means overlapping of holes, which will lead to drill breakage and hole damage due to multiple drilling in one location during drilling.
2. Overlap of two holes on a multilayer board. For example, one hole location is an isolation board and the other hole location is a connection board (flower bed). Therefore, after the negative is stretched, it will appear as an isolation plate, leading to scrap.
Second, the abuse of graphic layer
1. Some useless connections have been made on some graphic layers. Initially, four-layer boards were designed to have more than five layers of circuits, which caused misunderstanding.
2. The design needs less trouble. In Protel software, for example, all the lines of each layer are drawn with board layers and the lines are marked with board layers. Thus, when the data is polished, the circuit will be cut off and the connection lines will be missed because the board layer is not selected, or the circuit will be shorted because the marked lines on the board layer are selected. As a result, the integrity and clarity of the graphics layer will be maintained during the design process.
3. This violates the traditional design, for example, the part surface is designed on the bottom layer and the soldering surface is designed on the top layer, causing inconvenience.
Third, the random placement of characters
1. The character cover of the patch pad to the printed circuit board through testing and component soldering inconvenience.
2. The character design is too small, which makes screen printing very difficult. Too large will make the characters overlap and difficult to distinguish.
Fourth, the single pad aperture settings
1. Single-sided solder pads are usually not drilled. If the holes need to be marked, the hole diameter should be designed to zero. If a value is designed, when generating drilling data, the coordinates of the hole will appear in that position and problems will occur.
2. Single-sided pads such as drilled holes should be specially marked.
5. Drawing board with filler blocks
The drawing board with filler block can pass the DRC check when designing the circuit, but it is not suitable for machining. Therefore, solder resist data cannot be generated directly for such pads. When applying solder resist, the filler block area will be covered with solder resist, resulting in difficulty in soldering the device.
Sixth, the formation of electricity is flower pad and connection
Because the power supply is designed with a flower pad pattern, the grounding layer is opposite to the image on the actual printed board, and all connections are isolated lines, which should be very clear to the designer. Incidentally, care should be taken when drawing isolated lines for several groups of power supplies or several types of grounding. Should not leave any gap to make two groups of power short circuit or block the connection area (to separate a group of power supply).
Seven, processing level is not clearly defined
1. The veneer is designed to be on the top level. If the front and back are not specified, the manufactured panel may have devices installed, not soldered.
2. For example, when designing a four-layer board, use the top middle 1 layer and the middle 2 layers bottom 4 layers, but they are not arranged in this order during processing, which needs to be explained.
Eight, the design of the filler block too much or filler block filled with very thin lines.
1. There is data loss in the light drawing phenomenon, light drawing data is incomplete.
2. Because the filling block is drawn line by line in the process of light drawing data processing, so the amount of light drawing data generated is quite large, which increases the difficulty of data processing.
Nine, surface mount device pad is too short
This is for switch test. For too dense surface mount devices, the spacing between the two legs is very small and the pads are very thin. In order to install the test pin, must use the up and down (left and right) staggered position. For example, the pad design is too short, although it will not affect the device installation, but will make the test pins can not be opened correctly.
Ten, large area grid spacing is too small
The edge between the same lines that make up the large-area grid lines is too small (less than 0.3 mm). In the printed circuit board manufacturing process, many broken films are easily attached to the board after the image is displayed, resulting in broken lines.
Eleven, large-area copper foil is too close to the outer frame
The distance between the large-area copper foil and the outer frame should be at least 0.2 mm, because when milling the profile, such as milling copper foil, it is easy to cause copper foil warpage and solder resist layer off.
Twelve, the contour border design is not clear
Some customers have designed contour lines in the retention layer, board layer, top layer, etc. And these contour lines are inconsistent, which makes it difficult for printed circuit board manufacturers to determine which contour line should prevail.
Thirteen, graphic design is not uniform
Graphic plating, the plating is not uniform will affect the quality.
Fourteen, abnormal hole is too short
The length / width of the abnormal hole should be ≥ 2: 1, the width should be greater than 1.0 mm, otherwise the processing of abnormal holes when the drilling machine is easy to break, processing difficulties, increasing costs.
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